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Please use this identifier to cite or link to this item: https://libeldoc.bsuir.by/handle/123456789/29056
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dc.contributor.authorBelous, A. I.-
dc.contributor.authorSolodukha, V.-
dc.contributor.authorShvedov, S.-
dc.contributor.authorBorovik, A. M.-
dc.contributor.authorKostrov, A. I.-
dc.contributor.authorStempitsky, V. R.-
dc.date.accessioned2018-01-09T12:21:33Z-
dc.date.available2018-01-09T12:21:33Z-
dc.date.issued2017-
dc.identifier.citationParallel computing environment for digital devices simulation and VLSI topology verification / A. Belousand others // Nano-design, technology, computer simulations : proceedings of 17th International workshop on new approaches to high –tech (26-27 October, 2017). – Minsk : BSUIR, 2017. – С. 155 - 158.ru_RU
dc.identifier.urihttps://libeldoc.bsuir.by/handle/123456789/29056-
dc.language.isoenru_RU
dc.publisherБГУИРru_RU
dc.subjectматериалы конференцийru_RU
dc.subjectparallel computing environmentru_RU
dc.subjectdigital devices simulationru_RU
dc.subjectVLSI topology verificationru_RU
dc.titleParallel computing environment for digital devices simulation and VLSI topology verificationru_RU
dc.typeСтатьяru_RU
Appears in Collections:NDTCS 2017

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