Browsing by Author Zalivako, S. S.
Showing results 1 to 5 of 5
| Issue Date | Title | Author(s) |
| 2016 | Design and Implementation of High-Quality Physical Unclonable Functions for Hardware-Oriented Cryptography | Ivaniuk, A. A.; Zalivako, S. S.; Zhang, L.; Klybik, V. P.; Chang, C. H. |
| 2017 | FPGA Implementation of Modeling Attack Resistant Arbiter PUF with Enhanced Reliability | Zalivako, S. S.; Ivaniuk, A. A.; Chang, C. H. |
| 2017 | Low-cost Fortification of Arbiter PUF Against Modeling Attack | Zalivako, S. S.; Ivaniuk, A. A.; Chang, C. H. |
| 2016 | Multi-valued arbiters for quality enhancement of PUF responses on FPGA implementation | Ivaniuk, A. A.; Zalivako, S. S.; Puchkov, A. V.; Klybik, V. P.; Chang, C. H. |
| 2019 | Reliable and Modeling Attack Resistant Authentication of Arbiter PUF in FPGA Implementation With Trinary Quadruple Response | Zalivako, S. S.; Ivaniuk, A. A.; Chang, C. H. |
