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Please use this identifier to cite or link to this item: https://libeldoc.bsuir.by/handle/123456789/10946
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dc.contributor.authorPetrovsky, N.-
dc.contributor.authorStankevich, A.-
dc.contributor.authorPetrovsky, A.-
dc.date.accessioned2016-12-22T08:23:29Z-
dc.date.accessioned2017-07-27T12:27:16Z-
dc.date.available2016-12-22T08:23:29Z-
dc.date.available2017-07-27T12:27:16Z-
dc.date.issued2016-
dc.identifier.citationPetrovsky, N. Pipelined block-lifting-based embedded processor for multiplying quaternions using distributed arithmetic / N. Petrovsky, A. Stankevich, A. Petrovsky // 5th Mediterranean Conference on Embedded Computing (MECO). - Budva, 2016. — P. 222–225. - http://doi.org/10.1109/MECO.2016.7525746ru_RU
dc.identifier.urihttps://libeldoc.bsuir.by/handle/123456789/10946-
dc.description.abstractThis paper presents a systematic design of the of the integer-to-integer invertible quaternionic multiplier based on the block-lifting structure and pipelined embedded processor of the given multiplier using distributed arithmetic (DA) as a block of M-band linear phase paraunitary filter banks (LP PUFB) based on the quaternionic algebra (Q-PUFB) for the lossy-to-lossless image coding. A bank Q-PUFB based on the DA block-lifting structure reduces the number of rounding operations and has a regular layout. Since the block-lifting structures with rounding operations can implement the integer-to-integer transform (Q-PUFB).ru_RU
dc.language.isoenru_RU
dc.subjectпубликации ученыхru_RU
dc.subjectquaternionsru_RU
dc.subjectfilter banksru_RU
dc.subjectimage codingru_RU
dc.subjecttransformsru_RU
dc.subjectembedded computingru_RU
dc.titlePipelined block-lifting-based embedded processor for multiplying quaternions using distributed arithmeticru_RU
dc.typeArticleru_RU
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