| DC Field | Value | Language |
|---|
| dc.contributor.author | Novikov, P. E. | - |
| dc.contributor.author | Korsak, K. V. | - |
| dc.coverage.spatial | Минск | ru_RU |
| dc.date.accessioned | 2023-05-26T06:16:22Z | - |
| dc.date.available | 2023-05-26T06:16:22Z | - |
| dc.date.issued | 2023 | - |
| dc.identifier.citation | Novikov, P. E. Basic logic element of a field programmable gate array / Novikov P. E., Korsak K. V. // Электронные системы и технологии : сборник материалов 59-й научной конференции аспирантов, магистрантов и студентов БГУИР, Минск, 17–21 апреля 2023 г. / Белорусский государственный университет информатики и радиоэлектроники ; редкол.: Д. В. Лихаческий [и др.]. – Минск, 2023. – С. 1174–1176. | ru_RU |
| dc.identifier.uri | https://libeldoc.bsuir.by/handle/123456789/51583 | - |
| dc.description.abstract | The article deals with the basic architecture of programmable logic integrated circuits and basic logic element, part of its main component - configurable logic block. Electrical functional circuit of the basic logic element with the ability to perform the sum operation was designed. On the basis of the functional diagram the RTL-representation of the basic logic element was obtained and the results of its modeling are presented. | ru_RU |
| dc.language.iso | en | ru_RU |
| dc.publisher | БГУИР | ru_RU |
| dc.subject | материалы конференций | ru_RU |
| dc.subject | FPGA | ru_RU |
| dc.subject | basic logic element | ru_RU |
| dc.subject | computer-aided design | ru_RU |
| dc.subject | register transfer level | ru_RU |
| dc.title | Basic logic element of a field programmable gate array | ru_RU |
| dc.type | Article | ru_RU |
| Appears in Collections: | Электронные системы и технологии : материалы 59-й конференции аспирантов, магистрантов и студентов (2023)
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