| DC Field | Value | Language |
|---|
| dc.contributor.author | Kaiky, M. | - |
| dc.contributor.author | Shamyna, A. | - |
| dc.contributor.author | Ivaniuk, A. | - |
| dc.coverage.spatial | Минск | en_US |
| dc.date.accessioned | 2023-12-15T08:13:47Z | - |
| dc.date.available | 2023-12-15T08:13:47Z | - |
| dc.date.issued | 2023 | - |
| dc.identifier.citation | Kaiky, M. Fast prototyping of reconfiguable true random number generation ip-core / M. Kaiky, A. Shamyna, A. Ivaniuk // Информационные технологии и системы 2023 (ИТС 2023) = Information Technologies and Systems 2023 (ITS 2023) : материалы Международной научной конференции, Минск, 22 ноября 2023 / Белорусский государственный университет информатики и радиоэлектроники ; редкол.: Л. Ю. Шилин [и др.]. – Минск : БГУИР, 2023. – С. 125–126. | en_US |
| dc.identifier.uri | https://libeldoc.bsuir.by/handle/123456789/53880 | - |
| dc.description.abstract | This work is devoted of the structuren of a reconfigurable IP-core for rapid prototyping of true random number
sources based on Xilinx FPGAs. The developed IP-core allows you to configure TRNG at the design stage. In
the proposed IP-core, developers can easily change the structure of the Entropy Source unit, Conditioning units, post-processors, performance tests, DRBG, component access interfaces. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | БГУИР | en_US |
| dc.subject | материалы конференций | en_US |
| dc.subject | reconfigurable IP-core | en_US |
| dc.subject | prototyping of true random number | en_US |
| dc.title | Fast prototyping of reconfiguable true random number generation ip-core | en_US |
| dc.type | Article | en_US |
| Appears in Collections: | ИТС 2023
|
