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Please use this identifier to cite or link to this item: https://libeldoc.bsuir.by/handle/123456789/34332
Title: Stability of the platinum electrode during high temperature annealing
Authors: Golosov, D. A.
Zavadski, S.M.
Okojie, J. E.
Rudenkov A.S.
Kolos, V. V.
Melnikov, S. N.
Keywords: публикации ученых;Platinum;Bottom electrode;Ferroelectric memory cell;High-temperature annealing;Hillock;FeRAM
Issue Date: 2018
Publisher: University of Illinois at Urbana–Champaign, USA
Citation: Stability of the platinum electrode during high temperature annealing / D. A. Golosov [et al.] // Thin Solid Films. – 2018. – Vol. 661. – P. 53 – 59. – DOI: https://doi.org/10.1016/j.tsf.2018.06.049.
Abstract: The modifications of the structure, electrical resistivity and surface morphology of platinum thin films on Pt/Ti/Si and Pt/TiO2/boron-phosphor-silicate glass/Si structures resulted from high-temperature annealing in the presence of oxygen were studied. It was established that regardless of the sublayers used while annealing caused platinum to recrystallize and texturize in the direction [111], and the texture is suppressed in the directions [200] and [220]. The annealing caused the drop of the volume resistivity of thin films from 0.2 to ca. 0.15 μOhm×m, and practically shown no dependence on the film thickness in case it exceeded 200 nm. As a result of recrystallization Pt films became unsmooth at low annealing temperatures and as the temperature increased hillocks were formed on the film surface. Relaxation of the compressive stress in the Pt film, facilitating the reduction of its free energy and modification of the lattice parameter towards the equilibrium value, is known to be the major hillock formation mechanism. The level of intrinsic stress in the film and the annealing temperature both determine the initial hillock formation. The final hillock height, density, and size are related to the Pt layer thickness, sublayer structure, and to the annealing time and temperature. Optimization of the sublayer structure and annealing modes makes it possible to increase the annealing temperature to ca. 780°С without causing any substantial damages to Pt microrelief. That enables us to use these structures as the bottom electrode in ferroelectric memory cells.
URI: https://libeldoc.bsuir.by/handle/123456789/34332
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