Skip navigation

Browsing by Author Ivaniuk, A. A.

Jump to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
А Б В Г Д Е Ж З И Й К Л М Н О П Р С Т У Ф Х Ц Ч Ш Щ Ъ Ы Ь Э Ю Я
 
Showing results 1 to 9 of 9
Issue DateTitleAuthor(s)
2016Active Metering of Digital Devices: An OverviewIvaniuk, A. A.; Zalivaka, S. S.
2016Design and Implementation of High-Quality Physical Unclonable Functions for Hardware-Oriented CryptographyIvaniuk, A. A.; Zalivako, S. S.; Zhang, L.; Klybik, V. P.; Chang, C. H.
2016Digital Watermark and Fingerprint in Variable Rank Linear-Feedback Shift RegisterIvaniuk, A. A.; Sergeichik, V. V.
2019FPGA Based Arbiter Physical Unclonable Function Implementation with Reduced Hardware OverheadIvaniuk, A. A.; Zalivaka, S. S.
2017FPGA Implementation of Modeling Attack Resistant Arbiter PUF with Enhanced ReliabilityZalivako, S. S.; Ivaniuk, A. A.; Chang, C. H.
2017Low-cost Fortification of Arbiter PUF Against Modeling AttackZalivako, S. S.; Ivaniuk, A. A.; Chang, C. H.
2016Multi-valued arbiters for quality enhancement of PUF responses on FPGA implementationIvaniuk, A. A.; Zalivako, S. S.; Puchkov, A. V.; Klybik, V. P.; Chang, C. H.
2023NAND Flash Memory Devices Security Enhancement Based on Physical Unclonable FunctionsZalivaka, S. S.; Ivaniuk, A. A.
2019Reliable and Modeling Attack Resistant Authentication of Arbiter PUF in FPGA Implementation With Trinary Quadruple ResponseZalivako, S. S.; Ivaniuk, A. A.; Chang, C. H.